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MHT CET 2024 (11 May, Shift 1) · Logic Gates

Logic Gates question from MHT CET 2024 (11 May, Shift 1)

Q76MHT CET 2024 · 11 MAY · SHIFT 1Medium

Logic Gates

Following combination of gates is equivalent to

Figure

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Answer: (d)

  1. First NAND: C=AB‾C = \overline{AB}; middle NANDs give AC‾\overline{AC} and BC‾\overline{BC}.
  2. Output: Y=AC+BC=(A+B)AB‾Y = AC + BC = (A+B)\overline{AB}.
  3. Y=ABˉ+AˉBY = A\bar B + \bar A B, which is 1 only when the inputs differ.
  4. So the answer is (d) X-OR gate.
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