Student Login

Home›Chapters›Semiconductor Electronics PYQs›Logic Gates›Question 10

MHT CET 2026 (19 May, Shift 2) · Logic Gates

Logic Gates question from MHT CET 2026 (19 May, Shift 2)

Q10MHT CET 2026 · 19 MAY · SHIFT 2Medium

Logic Gates

For the logic circuit given below, for

a) input $A = 0$ and input $B = 1$ , and

b) input $A = 1$ and input $B = 1$ , the output $E$ is respectively

Show answer and solution

Answer: (d)

Top AND: $C = A \cdot B$ ; bottom AND: $D = \overline{A} \cdot B$ .
$E = A B + \overline{A} B = B(A + \overline{A}) = B$ .
Case a: $B = 1 \Rightarrow E = 1$ ; case b: $B = 1 \Rightarrow E = 1$ .
So the answer is (d) one and one.

Report a mistake

More questions on Logic Gates

The output Y, when all the three inputs are first high and then low, will respectively beMHT CET 2026 (14 May, Shift 2)
The output Y of the following digital logic circuit will be '1' (one) for the inputsMHT CET 2026 (20 Apr, Shift 1)
The Boolean expression for the given combination of logic gates isMHT CET 2026 (19 Apr, Shift 2)
The output Y of the given logic circuit isMHT CET 2026 (18 Apr, Shift 2)
In the following digital circuit, the output 'Y' will be '1' (one) for inputs 'A' and 'B'…MHT CET 2026 (17 Apr, Shift 2)
To get the truth table shown from the following logic circuit, the gate G should beMHT CET 2026 (17 Apr, Shift 1)
The output Y for the given inputs A and B to the circuit is:JEE Main 2026 (8 Apr, Shift 2)
Refer to the logic circuit given below. For two inputs ( A = 1, B = 1) and ( A = 0, B =…JEE Main 2026 (6 Apr, Shift 2)