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JEE Main 2023 (8 Apr, Shift 1) · Logic Gates

Logic Gates question from JEE Main 2023 (8 Apr, Shift 1)

Q105JEE Main 2023 · 8 APR · SHIFT 1Medium

Logic Gates

For the logic circuit shown, the output waveform at $\mathrm{Y}$ is:

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Answer: (b)

NAND with joined inputs is NOT, so the last NAND gives $Y = \overline{\bar{A}\,\bar{B}} = A + B$ (OR).
0–1: $A=0, B=0 \Rightarrow Y=0$ ; 1–2: $B=1 \Rightarrow Y=1$ ; 2–4: $A=1 \Rightarrow Y=1$ .
So $Y$ is low up to $t=1$ and high after that: the answer is (b).

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