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MHT CET 2021 (24 Sep, Shift 1) · Logic Gates

Logic Gates question from MHT CET 2021 (24 Sep, Shift 1)

Q121MHT CET 2021 · 24 SEP · SHIFT 1Medium

Logic Gates

For the output of the following logic circuit to be '1', the values of inputs A and B should be respectively

Figure

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Answer: (b)

  1. OR followed by NOT is a NOR gate: Y=A+B‾Y = \overline{A + B}.
  2. Y=1Y = 1 only when A+B=0A + B = 0, i.e. A=0,B=0A = 0, B = 0.
  3. So the answer is (b) 0 and 0.
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