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MHT CET 2026 (11 Apr, Shift 2) · Logic Gates

Logic Gates question from MHT CET 2026 (11 Apr, Shift 2)

Q7MHT CET 2026 · 11 APR · SHIFT 2Easy

Logic Gates

In the case of NAND gate, if A and B are inputs and Y is the output then

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Answer: (c)

  1. NAND = AND followed by NOT.
  2. Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (c).
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