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MHT CET 2026 (15 Apr, Shift 2) · Logic Gates

Logic Gates question from MHT CET 2026 (15 Apr, Shift 2)

Q32MHT CET 2026 · 15 APR · SHIFT 2Difficult

Logic Gates

In the logic circuit diagram, when all the four inputs, A, B, C, D are 'one' the outputs Y1,Y2,Y3Y_1, Y_2, Y_3 are respectively (1, 1, 0). When the inputs A and C are changed to zero and B and D are still 'one', then the outputs Y1,Y2,Y3Y_1, Y_2, Y_3 are respectively change to

Figure

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Answer: (b)

  1. NOR followed by NOT gives Y1=A+BY_1 = A + B; the AND gives Y2=CDY_2 = CD; the NOR gives Y3=Y1+Y2‾Y_3 = \overline{Y_1 + Y_2}.
  2. Check: all inputs 1 gives Y1=1,Y2=1,Y3=0Y_1 = 1, Y_2 = 1, Y_3 = 0, as stated.
  3. Now A=C=0A = C = 0, B=D=1B = D = 1: Y1=0+1=1Y_1 = 0 + 1 = 1, Y2=0⋅1=0Y_2 = 0 \cdot 1 = 0, Y3=1+0‾=0Y_3 = \overline{1 + 0} = 0.
  4. So the answer is (b) 1,0,01, 0, 0.
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