Student Login

Home›Chapters›Semiconductor Electronics PYQs›Logic Gates›Question 77

MHT CET 2024 (10 May, Shift 2) · Logic Gates

Logic Gates question from MHT CET 2024 (10 May, Shift 2)

Q77MHT CET 2024 · 10 MAY · SHIFT 2Medium

Logic Gates

The logic gate represented by following logic circuit is

Show answer and solution

Answer: (d)

NAND gives $\overline{AB}$ , OR gives $A+B$ .
AND: $Y = (A+B)\overline{AB} = (A+B)(\bar A + \bar B) = A\bar B + \bar A B$ .
So the answer is (d) X-OR gate.

Report a mistake

More questions on Logic Gates

The resultant gate and its Boolean expression in the given circuit isMHT CET 2024 (9 May, Shift 2)
The logic gate combination circuit shown in the figure performs the logic function ofMHT CET 2024 (2 May, Shift 2)
The logic circuit in figure is equivalent toMHT CET 2024 (2 May, Shift 1)
The output ( Y) of the given logic gate is similar to the output of an/aNEET 2024
Identify the logic gate given in the circuit:JEE Main 2024 (4 Apr, Shift 2)
Identify the logic operation performed by the given circuit.JEE Main 2024 (31 Jan, Shift 1)
If two inputs of a NAND gate are shorted, the resulting gate isMHT CET 2023 (13 May, Shift 1)
In the case of NAND gate, if A and B are the inputs and Y is the output thenMHT CET 2023 (11 May, Shift 1)