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MHT CET 2023 (10 May, Shift 2) · Logic Gates

Logic Gates question from MHT CET 2023 (10 May, Shift 2)

Q86MHT CET 2023 · 10 MAY · SHIFT 2Medium

Logic Gates

The output of an 'OR' gate is connected to both the inputs of a 'NAND' gate. The combination will serve as

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Answer: (c)

OR output: $A + B$ .
NAND with both inputs tied together acts as NOT: $Y = \overline{(A + B) \cdot (A + B)} = \overline{A + B}$ .
So the answer is (c) NOR gate.

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