Logic Gates question from MHT CET 2024 (16 May, Shift 1)

Answer: (c)

1. A NAND gate with both inputs joined acts as NOT: outputs are $\bar{A}$ and $\bar{B}$.
2. Final NAND: $Y = \overline{\bar{A} \cdot \bar{B}} = A + B$ (De Morgan).
3. So Y is the OR table: $0, 1, 1, 1$ for $AB = 00, 01, 10, 11$.
4. So the answer is (c), the third table.