Physics Circle home Student Login

Home›Chapters›Semiconductor Electronics PYQs›Logic Gates›Question 147

JEE Main 2019 (10 Jan, Shift 1) · Logic Gates

Logic Gates question from JEE Main 2019 (10 Jan, Shift 1)

Q147JEE Main 2019 · 10 JAN · SHIFT 1Medium

Logic Gates

To get output 1 at R, for the given logic gate circuit the input values must be

Figure

Show answer and solution

Answer: (b)

  1. OR gate gets xˉ\bar{x} and yy: P=xˉ+yP = \bar{x} + y.
  2. NAND gets xx and yˉ\bar{y}: Q=xyˉ‾=xˉ+yQ = \overline{x\bar{y}} = \bar{x} + y.
  3. R=P+Q‾=xˉ+y‾=xyˉR = \overline{P + Q} = \overline{\bar{x} + y} = x\bar{y}.
  4. R=1R = 1 only when x=1,y=0x = 1, y = 0. So the answer is (b).
Report a mistake

More questions on Logic Gates