To get the truth table shown from the following logic circuit, the gate G should be (a) NAND gate. (b) NOR gate. (c) AND gate. (d) OR gate.

Answer: (c). Y = A + G(A, B). The table shows Y = A in every row. So when A = 0, G must give 0 for both B = 0 and B = 1; when A = 1, Y is 1 anyway. AND: 0 · 0 = 0, 0 · 1 = 0. OR, NAND and NOR each give 1 in one of these rows. So the answer is (c) AND gate.

To get the truth table shown from the following logic circuit, the… | MHT CET 2026 (17 Apr, Shift 1)

Q16MHT CET 2026 · 17 APR · SHIFT 1Medium

Logic Gates

To get the truth table shown from the following logic circuit, the gate G should be

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Answer: (c)

$Y = A + G(A, B)$ . The table shows $Y = A$ in every row.
So when $A = 0$ , G must give 0 for both $B = 0$ and $B = 1$ ; when $A = 1$ , Y is 1 anyway.
AND: $0 \cdot 0 = 0$ , $0 \cdot 1 = 0$ . OR, NAND and NOR each give 1 in one of these rows.
So the answer is (c) AND gate.

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Logic Gates question from MHT CET 2026 (17 Apr, Shift 1)

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