Semiconductor Electronics: theory

CONCEPT

Energy Bands in Solids

In one line
Atoms packed in a solid turn their sharp energy levels into bands. The gap between two bands decides whether the solid conducts.

BANDS

27.1.1 How bands form

An isolated atom has sharp, separate energy levels.
In a crystal, atoms are close and their outer electrons interact.
By Pauli’s exclusion principle no two electrons can share a state, so each level spreads into a band.

Levels spread into bands as atoms come close

THREE REGIONS

27.1.2 Valence band, conduction band, forbidden gap

Valence band (VB): band of valence electrons, highest filled band at 0 K. These electrons cannot carry current.
Conduction band (CB): next higher band. Its electrons are free and carry current.
Forbidden gap: no electron can stay here.

Energy gap between the two bands

E_g = (CB)_min − (VB)_max

E_g falls very slightly as temperature rises.
Light can lift an electron across only if hν ≥ E_g.

λ_max = hcE_g = 1240E_g (eV) nm

TYPES OF SOLIDS

27.1.3 Conductor, insulator, semiconductor

The band gap sorts all solids

	Conductor	Insulator	Semiconductor
Bands	VB, CB overlap	VB full, CB empty	VB nearly full, CB nearly empty
E_g	zero	> 3 eV (diamond 6 eV)	about 1 eV
ρ (Ω m)	10⁻⁸ to 10⁻²	10¹¹ to 10¹⁹	10⁻⁵ to 10⁶
Carriers	free electrons	none	electrons, holes
Examples	Cu, Ag, Al	wood, glass, mica	Si, Ge, GaAs

VALUES

27.1.4 Band gaps to remember

Material	E_g
Ge	0.7 eV
Si	1.1 eV
GaAs	1.3 eV
Diamond (C)	6 eV

So (E_g)_C > (E_g)_Si > (E_g)_Ge.
At room temperature a few electrons cross the gap in Si and Ge. Almost none cross in diamond.
Good conductors have no hole current, because their bands overlap.

Practise PYQs on this topicEnergy Bands in Solids · 23 questions with solutions

CONCEPT

Intrinsic & Extrinsic Semiconductors

In one line
A pure semiconductor has equal electrons and holes. A tiny impurity makes one of them the majority, and conductivity jumps.

INTRINSIC

27.2.1 Pure semiconductor

Si and Ge have 4 valence electrons, held in covalent bonds.
Heat breaks some bonds. Each broken bond gives one free electron and one hole.
Conduction due only to breaking of covalent bonds is intrinsic.
At 0 K no bond is broken, so pure Si behaves as an insulator.

n_e = n_h = n_i

HOLE

27.2.2 What a hole is

A hole is a vacancy left by a missing electron.
It acts like a positive charge +e, though no real positive particle moves.
A neighbouring electron fills it, so the hole appears to move.
Holes are slower than electrons: v_e > v_h.

DOPING

27.2.3 Adding impurity

Doping adds about 1 impurity atom per 10⁶ to 10⁸ host atoms.
Generally it decreases the resistivity sharply.
A doped semiconductor is called extrinsic, and n_e ≠ n_h.

N-TYPE

27.2.4 Pentavalent impurity

Four electrons of As bond; the fifth is free

Dopants (5 valence electrons): P, As, Sb. They are donors.
Majority carriers: electrons. Minority carriers: holes.
n_e ≫ n_h, and the crystal stays electrically neutral.
Free electrons occupy the donor level, in the gap just below the CB.

Donor level just below the conduction band

P-TYPE

27.2.5 Trivalent impurity

In has only 3 valence electrons, so one bond has a hole

Dopants (3 valence electrons): B, Al, Ga, In. They are acceptors.
Majority carriers: holes. Minority carriers: electrons.
n_h ≫ n_e, and the crystal stays electrically neutral.
Acceptor level lies in the gap just above the VB.

Acceptor level just above the valence band

COMPARE

27.2.6 n-type and p-type

	n-type	p-type
Impurity	pentavalent (P, As, Sb)	trivalent (B, Al, In)
Majority	electrons	holes
Minority	holes	electrons
New level	just below CB	just above VB
Net charge	zero	zero

Practise PYQs on this topicIntrinsic & Extrinsic Semiconductors · 67 questions with solutions

CONCEPT

Carrier Concentration, Conductivity & Temperature

In one line
The product n_en_h stays fixed at a given temperature. Heating makes more carriers, so a semiconductor’s resistance falls.

MASS ACTION LAW

27.3.1 Finding the minority carriers

n_en_h = n_i²

Holds at thermal equilibrium, for doped and pure samples.
More majority carriers means fewer minority carriers.

Doping	Majority	Minority
Donor density N_D	n_e ≈ N_D	n_h = n_i²N_D
Acceptor density N_A	n_h ≈ N_A	n_e = n_i²N_A

Doping of 1 ppm: donor density = 10⁻⁶ × atoms per m³.
Si at 300 K: n_i ≈ 1.5 × 10¹⁶ m⁻³. Ge: n_i ≈ 2.4 × 10¹⁹ m⁻³.

CONDUCTION

27.3.2 Two currents in one direction

Electrons and holes move opposite ways, but both currents add

I = I_e + I_h

I = eA(n_ev_e + n_hv_h)

σ = e(n_eμ_e + n_hμ_h)

Equal concentrations in n-type and p-type: the n-type carries more current, as electrons are more mobile.

TEMPERATURE

27.3.3 Metal against semiconductor

Resistivity with temperature

On heating	Metal	Semiconductor
Carriers	no real change	increase sharply
Collisions	increase	increase
Resistance	increases	decreases
Conductivity	decreases	increases
Temp. coefficient	positive	negative

The difference arises from the change in the number of carriers with temperature.
On cooling, the resistance of Cu falls and that of Si or Ge rises.
In a circuit with a semiconductor in series, heating raises the current.

n_i ∝ T^{3 ÷ 2} e^{−E_g ÷ 2kT}

n_i rises very quickly with T. Heating adds electrons and holes equally.
Ge conducts better than Si at room temperature, as its gap is smaller.

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Mobility and resistivity

μ = v_dE

σ = e(n_eμ_e + n_hμ_h)

ρ = 1σ

μ unit: m²V⁻¹s⁻¹.
Electrons are more mobile than holes: μ_e > μ_h.
n-type: σ ≈ n_eeμ_e. p-type: σ ≈ n_heμ_h.
Current ratio: I_eI_h = n_ev_en_hv_h

Fermi level

Intrinsic: in the middle of the gap.
n-type: near the conduction band.
p-type: near the valence band.
Metal: inside the conduction band.
Heavier doping moves it further towards that band.

Practise PYQs on this topicIntrinsic & Extrinsic Semiconductors · 67 questions with solutions

CONCEPT

Depletion Layer & Biasing

In one line
Joining p and n creates a thin charged layer with a built-in barrier. Forward bias lowers it and reverse bias raises it, so a diode conducts one way.

FORMATION

27.4.1 How the depletion layer forms

Electrons are plenty in n and holes are plenty in p.
Carriers diffuse across, because of this concentration difference.
They leave behind fixed ions: + on the n side, − on the p side.
This layer of immobile ions has no free carriers: the depletion layer.

Field E points from n to p, opposing further diffusion

BARRIER

27.4.2 Potential barrier

The two ion layers create a barrier potential V_B; the n side is at the higher potential.
Ge: V_B ≈ 0.3 V. Si: V_B ≈ 0.7 V.
V_B depends on the material, doping and temperature.
Width of the layer ≈ 1 μm, and it shrinks with heavier doping.

E = V_Bd

Across the junction, unbiased

CURRENTS

27.4.3 Diffusion and drift

Diffusion current: majority carriers, from p to n.
Drift current: minority carriers pushed by E, from n to p.
Unbiased: the two are equal, so net current is zero.
Forward biased: diffusion is larger than drift.

FORWARD BIAS

27.4.4 p to +, n to −

Depletion layer becomes thinner and the barrier falls.
Current rises sharply above the knee voltage (Ge 0.3 V, Si 0.7 V).
Resistance is low: about 10 to 25 Ω.

REVERSE BIAS

27.4.5 p to −, n to +

Depletion layer becomes wider and the barrier rises.
Only a tiny μA current flows, due to minority carriers.
Resistance is very high: about 10⁵ Ω.

READING A FIGURE

27.4.6 Is it forward biased?

Compare potentials at the two ends. Arrow side higher than bar side: forward.
Only the difference matters: +5 V and +3 V across a diode is forward by 2 V if the arrow side is at +5 V.
Both negative also works: −2 V on the arrow side and −5 V on the bar side is forward.

I-V CURVE

27.4.7 One-way device

Characteristic of a p-n junction diode

BREAKDOWN

27.4.8 Large reverse voltage

Current suddenly increases at the breakdown voltage.
Zener breakdown: heavy doping, strong field breaks bonds directly.
Avalanche breakdown: light doping, fast carriers knock out more carriers in a chain.
An ordinary diode is damaged here; a Zener is built for it.

USES

27.4.9 What a diode can and cannot do

It can rectify, give light (LED), detect light and give solar power.
It cannot amplify an a.c. signal: that needs a transistor.
A device that passes 10 mA one way and almost none the other way is a p-n junction.

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Dynamic resistance

r_d = ΔVΔI

Take ΔV and ΔI from the I-V graph, near the given point.
Read ΔV over a small ΔI: the curve is steeper at higher V, so r_d is smaller there.
It is not V ÷ I, which gives the static resistance.

Diode equation

I = I_s(e^{eV ÷ kT} − 1)

I_s = reverse saturation current.
Forward: current rises exponentially.
Reverse: I ≈ −I_s.

Unequal doping

Equal charge lies on both sides of the junction.
So the depletion layer goes deeper into the lightly doped side.

Energy across the barrier

½mv² (p side) = ½mu² (n side) − eV_B

An electron crossing from n to p loses kinetic energy eV_B.

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CONCEPT

Diode Circuits

In one line
First decide which diodes are ON and which are OFF. Replace them with a wire or a break, then solve an ordinary circuit.

IDEAL DIODE

27.5.1 A one-way switch

Ideal diode as a switch

Bias	Resistance	Replace by
Forward	zero	wire
Reverse	infinite	open break

METHOD

27.5.2 Solving in three steps

Trace the current direction from the + of the battery.
A diode pointing along it is ON. Against it is OFF, so remove that branch.
Apply Ohm’s law to what is left.

NON-IDEAL

27.5.3 Knee voltage and forward resistance

A silicon diode drops about 0.7 V when ON. Germanium drops about 0.3 V.
If a forward resistance is given, add it in series.

I = E − V_DR + r_f

Safe current limit I: minimum R = (E − V_D) ÷ I.
A diode power rating P gives I_max = P ÷ V_D.

PARALLEL BRANCHES

27.5.4 One diode in each branch

Here D₁ conducts and D₂ is off for this polarity

Check each branch separately.
The reverse-biased branch carries zero current.
Two opposite diodes in parallel: one is always ON, so the path always conducts.

RESISTANCE AB

27.5.5 Ratio questions

Redraw the network once with the diode as a wire and once with a break.
Find R_AB both ways, and then the ratio.

POTENTIALS

27.5.6 Diode between two voltages

Current through a diode with ends at V₁ and V₂ needs arrow side higher.
I = (V₁ − V₂) ÷ R; it is zero if the bar side is higher.
With two batteries, use the net emf: adding if they aid, subtracting if they oppose.

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Square or ac input

Work out the diode state separately in each half cycle.
When OFF, the output across a series resistor is zero.
With a 0.6 V or 0.7 V drop, the output peak falls by that drop.

Clipper

A diode across the output, in series with a battery V, clips the wave at about V.
Two opposite diodes clip both halves.

Diode with RC

Capacitor branch in steady state: no current, so treat it as an open circuit.
Find the time constant with the path the discharge really takes: τ = R_pathC.
A reverse-biased diode blocks that path.

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CONCEPT

Rectifiers & Filters

In one line
A diode passes only one half of a.c., so the output is one-way but pulsating. A filter and a regulator then smooth it to steady d.c.

HALF-WAVE

27.6.1 One diode

Output only in the half where D is forward biased

Positive half cycle: diode ON, output appears.
Negative half cycle: diode OFF, no output.
Output frequency = input frequency, f.
Output pulses per second = N for N Hz input.

I_dc = I₀π, I_rms = I₀2

V_dc = V₀π

FULL-WAVE

27.6.2 Centre-tap, two diodes

D₁ and D₂ conduct in alternate half cycles

Positive half: D₁ ON, D₂ OFF. Negative half: D₂ ON, D₁ OFF.
Current through the load is in the same direction both times.
Output frequency = 2f. For 50 Hz mains the ripple is 100 Hz.
Each diode gets half the secondary voltage.

I_dc = 2I₀π, I_rms = I₀√2

BRIDGE

27.6.3 Four diodes, no centre tap

Two diodes conduct in each half cycle

In each half cycle, two diodes in series conduct and two are OFF.
Output is the same as full-wave, at 2f.

COMPARE

27.6.4 Half-wave and full-wave

	Half-wave	Full-wave
Diodes	1	2 (bridge: 4)
Output frequency	f	2f
Ripple factor	1.21	0.48
Max efficiency	40.6%	81.2%
PIV	V₀	2V₀ (bridge: V₀)

η_full = 2η_half.
PIV is the largest reverse voltage a diode must bear.

FILTER

27.6.5 Removing the ripple

Filter and regulator smooth the output

A capacitor goes in parallel with the load. It charges at the peaks and discharges in between.
A choke (inductor) goes in series with the load.
A π-filter gives the best ripple control.
The capacitor removes the a.c. ripple, not the diodes or the transformer.

POWER SUPPLY

27.6.6 Order of the blocks

From a.c. mains to constant d.c.

Correct order: rectifier, then filter, then voltage regulator.

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CONCEPT

Zener Diode

In one line
A heavily doped diode made to work in reverse breakdown. Its voltage stays fixed at V_Z while its current changes, so it steadies a supply.

BASICS

27.7.1 Structure and working

Both p and n are heavily doped, so the depletion layer is narrow.
The narrow layer gets a very strong field, about 5 × 10⁶ V m⁻¹.
That field pulls electrons out of bonds: Zener breakdown.
It is not damaged unless its power rating is crossed.
In forward bias, it acts as an ordinary diode.

The steep reverse part is what regulates

REGULATOR

27.7.2 How it is connected

Series R, Zener in reverse, in parallel with the load

Connected in reverse bias and in parallel with the load.
Series resistor R takes up the extra voltage.
If V_in rises, I_Z rises, the drop across R rises, and V_L stays at V_Z.

SOLVING

27.7.3 Standard route

V_L = V_Z

I = V_in − V_ZR

I_L = V_ZR_L

I_Z = I − I_L

Check first: without the Zener, is the voltage across R_L more than V_Z?
If not, the Zener stays OFF, I_Z = 0, and it is a plain potential divider.

POWER RATING

27.7.4 Safe limits

I_Z(max) = PV_Z

R_min = V_in(max) − V_ZI_Z(max)

Take the highest input voltage when finding the minimum R.
Power in the Zener = V_ZI_Z.

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CONCEPT

LED, Photodiode & Solar Cell

In one line
The LED turns current into light in forward bias. The photodiode (reverse bias) and solar cell (no bias) turn light into current.

Arrows leave an LED and enter a photodiode

LED

27.8.1 Light emitting diode

A heavily doped p-n junction, always used in forward bias.
Electrons and holes recombine and release energy as photons.
Photon energy is equal to or slightly less than E_g.
Visible light needs E_g from about 1.8 eV to 3 eV.

λ = hcE_g = 1240E_g (eV) nm

Larger E_g means a larger knee voltage

Material	Light
GaAs, AlGaAs	infrared
GaAsP	red, orange, yellow
GaP	green
ZnSe, GaN	blue

Advantages: low voltage, low power, long life, fast switching.
Brightness can be controlled by the current, and colours do not fade.
Intensity rises with current up to a limit, then falls.
To protect an LED, use a series resistor.

PHOTODIODE

27.8.2 Light detector

Used in reverse bias. Light with hν ≥ E_g makes electron-hole pairs.
Reverse current depends on light intensity.
Why reverse? The fractional change in minority carriers is large, so the change in current is easy to measure.
Reverse current rises with intensity, due to the extra minority carriers.

λ_max = hcE_g

Only λ < λ_max can be detected.
E_g = 2.8 eV: λ_max ≈ 4430 Å. So 4000 Å is detected, but 6000 Å is not.

SOLAR CELL

27.8.3 Photovoltaic device

No external bias. It generates emf when light falls on it.
Three steps: generation of pairs, separation by the junction field, collection.
Band gap should be between 1.0 eV and 1.8 eV.
Top layer (p) is thin, so that light reaches the junction.

Curve lies in the 4th quadrant

WHICH DEVICE?

27.8.4 Reading the graph

Device	Bias	I-V clue	Use
Rectifier diode	forward	1st quadrant knee	rectifier
Zener	reverse	3rd quadrant, vertical	regulator
LED	forward	1st, by colour	light source
Photodiode	reverse	3rd, by intensity	light detector
Solar cell	none	4th quadrant	electric power

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Photodiode graph

I₃ > I₂ > I₁: larger intensity gives a larger reverse current

Reverse current depends on intensity, and hardly on the reverse voltage.
It saturates at a small reverse voltage.

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CONCEPT

Transistor Structure & Current Relations

In one line
Two p-n junctions back to back. A small base current controls a large collector current: I_E = I_B + I_C.

STRUCTURE

27.9.1 Three regions

The emitter arrow shows the conventional current

Region	Size	Doping	Job
Emitter	moderate	heavy	supplies carriers
Base	thinnest	light	passes them on
Collector	largest	moderate	collects them

Heavily doped: emitter. Lightly doped: base.
Two diodes back to back: npn has both arrows pointing away from the base.
But two separate diodes cannot act as a transistor, because the base must be thin.

ACTIVE MODE

27.9.2 Biasing for amplification

Emitter-base junction: forward biased.
Collector-base junction: reverse biased.
npn conducts with collector + and emitter − with respect to the base.

Mode	E-B	C-B	Acts as
Active	forward	reverse	amplifier
Saturation	forward	forward	closed switch
Cut-off	reverse	reverse	open switch

WORKING

27.9.3 Where the carriers go

Only a few electrons are lost in the thin base (npn)

npn: emitter injects electrons into the base. pnp: emitter injects holes into the base.
Those are minority carriers in the base.
Base is thin and lightly doped, so few recombine.
Most pass on to the collector.

I_E = I_B + I_C

If x% of electrons reach the collector: I_C = x% of I_E.
Number of electrons per second × e = current.

CURRENT GAINS

27.9.4 α and β

α = I_CI_E

β = I_CI_B

α is slightly less than 1, usually 0.95 to 0.99.
β is large, usually 20 to 200.
For small changes: β_ac = ΔI_C ÷ ΔI_B, at constant V_CE.

RELATION

27.9.5 Convert one into the other

β = α1 − α

α = β1 + β

1α − 1β = 1

α	0.95	0.96	0.98	0.99
β	19	24	49	99

Given β and I_E: I_C = αI_E = [β ÷ (1 + β)] I_E.
Collector voltage drop gives I_C = V_R ÷ R_C, and then I_B = I_C ÷ β.

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CONCEPT

CE Amplifier, Switch & Oscillator

In one line
In common emitter mode a small input signal gives a large output, 180° out of phase. Voltage gain is βR_L ÷ R_i.

CE AMPLIFIER

27.10.1 Circuit and action

Input between base and emitter, output between collector and emitter

Input is between base and emitter. Output is between collector and emitter.
Base-emitter junction forward biased, collector-base reverse biased.
Operated in the active region.
Input impedance is low and output impedance is high.

V_CE = V_CC − I_CR_L

When I_B rises, I_C rises and V_CE falls. That is the 180° phase reversal.
An output signal for V_i = V₀ cos(ωt) is A_VV₀ cos(ωt + π).

GAINS

27.10.2 Three formulas to know

A_V = ΔV_oΔV_i = β R_LR_i

A_P = βA_V = β² R_LR_i

g_m = ΔI_CΔV_BE = βR_i

Ratio: A_PA_V = β.
Output voltage: V_o = A_VV_i.
Base current: I_b = V_i ÷ R_i. Collector current: I_c = βI_b.
Using A_V and impedances: A_P = A_V² R_i ÷ R_o.

CONFIGURATIONS

27.10.3 CB, CE, CC

	CB	CE	CC
Current gain	α < 1	β, high	high
Voltage gain	medium	high	below 1
Power gain	medium	highest	low
Phase	0°	180°	0°

Common base: output in phase with the input.
CE is most used: it gives the highest power gain.

CHARACTERISTICS

27.10.4 CE graphs

Input: I_B with V_BE, at fixed V_CE

Input resistance is about 1 kΩ. Output resistance is much larger.

SWITCH

27.10.5 Cut-off and saturation

V_o against V_i for a base-biased transistor

Switch: cut-off (OFF) and saturation (ON).
Amplifier: the straight active region.

OSCILLATOR

27.10.6 a.c. with no input

Amplifier + positive feedback

It generates a.c. with no external input, using a tank circuit, amplifier and positive feedback.
Part of the output power returns to the input in phase.

f = 12π√(LC)

Condition: if a fraction k of output feeds back, then kA_V = 1.
Damped LC swings are kept steady by this feedback, giving a constant-amplitude wave.

JEE · NEET

Corner

Current gain from a graph

Output characteristics

β_ac = (ΔI_CΔI_B)_{V_CE}

Read ΔI_C between two I_B curves at the same V_CE.
Output resistance r_o = (ΔV_CEΔI_C) at fixed I_B; it is large.
Input resistance r_i = (ΔV_BEΔI_B) at fixed V_CE; it is small.

Biasing a circuit

Input loop: V_BB = I_BR_B + V_BE.
Output loop: V_CC = I_CR_C + V_CE.
Saturation starts when V_CE ≈ 0, so I_C ≈ V_CC ÷ R_C.

Testing with a multimeter

Base-emitter and base-collector each act as a diode.
npn: low resistance with + on the base. pnp: low resistance with − on the base.
No conduction between C and E in either direction.

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CONCEPT

Basic Gates, NAND, NOR, XOR

In one line
A logic gate has one output for its digital inputs. Three basics, OR, AND and NOT, build all the others. Learn the one master truth table below.

DIGITAL

27.11.1 Two states only

Analogue is continuous; digital has only 0 and 1

1 = high, on, true. 0 = low, off, false.
Boolean algebra uses three operations: OR (+), AND (·), NOT (bar).

BASIC GATES

27.11.2 OR, AND, NOT

OR is switches in parallel, AND is switches in series

OR Y = A + B

AND Y = A · B

NOT Y = A

OR: output 1 if either or both inputs are 1.
AND: output 1 only if all inputs are 1.
NOT: output is the opposite of the input.

DERIVED GATES

27.11.3 NAND, NOR, XOR, XNOR

NAND Y = A · B

NOR Y = A + B

XOR Y = AB + AB

XNOR Y = AB + A B

TRUTH TABLE

27.11.4 Master table

A	B	OR	AND	NAND	NOR	XOR	XNOR
0	0	0	0	1	1	0	1
0	1	1	0	1	0	1	0
1	0	1	0	1	0	1	0
1	1	1	1	0	0	0	1

NAND: 0 only when all inputs are 1.
NOR: 1 only when all inputs are 0.
XOR: 1 when inputs are different; 1 for an odd number of 1s.
XNOR: 1 when inputs are the same.

QUICK RECOGNITION

27.11.5 Two clues give the gate

Clue	Gate
(0, 0) gives 1 and (1, 0) gives 1	NAND
(0, 0) gives 1 and (1, 0) gives 0	NOR
(1, 0) gives 1 and (0, 0) gives 0	OR or XOR
(1, 1) gives 0 and (1, 0) gives 1	NAND or XOR

SHORTED INPUTS

27.11.6 Two inputs joined

NAND with A = B gives NOT.
NOR with A = B gives NOT.
AND or OR with A = B just gives A.

GATE AFTER GATE

27.11.7 NOT at the output

Combination	Result
AND then NOT	NAND
OR then NOT	NOR
NAND then NOT	AND
NOR then NOT	OR
XOR then NOT	XNOR

BOOLEAN RULES

27.11.8 For simplifying

Rule	Result
A + 0, A + 1	A, 1
A · 0, A · 1	0, A
A + A, A · A	A, A
A + A, A · A	1, 0
A + AB	A
A + AB	A + B

A + B = A · B

A · B = A + B

These two are De Morgan’s theorems. A double bar cancels.

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CONCEPT

Gate Circuits & Boolean Output

In one line
Label the output of every gate from left to right, then simplify with De Morgan. This is the most asked idea of the chapter.

METHOD 1

27.12.1 Finding Y for given inputs

Write the inputs on the circuit.
Find each gate’s output in turn, from left to right.
Write the value on each wire. Never skip a gate.

METHOD 2

27.12.2 Which gate is it equivalent to?

Try all four inputs: (0, 0), (0, 1), (1, 0), (1, 1).
Build the Y column.
Match it with the master truth table.

Y column	Gate
0 1 1 1	OR
0 0 0 1	AND
1 1 1 0	NAND
1 0 0 0	NOR
0 1 1 0	XOR
1 0 0 1	XNOR

METHOD 3

27.12.3 Boolean expression

Write the expression at each gate, using A, B and bars.
Break long bars with De Morgan’s theorems.
Simplify using the rules of Concept 11.

UNIVERSAL GATES

27.12.4 NAND alone can build everything

NOT, AND and OR from NAND gates only

Build	NAND circuit	Result
NOT	one, inputs joined	A
AND	NAND then NOT	A · B
OR	NOT each input, then NAND	A + B

NOR is the other universal gate.

Build	NOR circuit	Result
NOT	one, inputs joined	A
OR	NOR then NOT	A + B
AND	NOT each input, then NOR	A · B

Output of AND into NOT, or a bubble at a gate’s input, means the signal is inverted.
NOT each input, then AND: A · B = A + B, so it is a NOR gate.
NOT each input, then OR: A + B = A · B, so it is a NAND gate.

XOR

27.12.5 From basic gates

Y = A̅B + AB̅

MISSING GATE

27.12.6 Find G from the truth table

Find the two inputs arriving at G from the truth table rows.
Write them beside the required Y.
Match that small table with the master table.

JEE · NEET

Corner

Waveform questions

Split the time axis wherever A or B changes.
Read A and B in each slot and use the truth table.
Draw Y slot by slot.

Three or more inputs

Number of rows in a truth table = 2ⁿ.
XOR of many inputs is 1 when an odd number of inputs are 1.

Practise PYQs on this topicLogic Gates · 192 questions with solutions

EXAM-DAY CARD

Just see this before the exam

n_en_h = n_i²

mass action

λ = hcE_g

band gap, LED

I = V_in − V_ZR

Zener

f_out = f, 2f

half, full wave

β = α1 − α

transistor

A · B = A + B

De Morgan

FORMULA SHEET

Whole chapter on one page

Bands

E_g: Si 1.1, Ge 0.7 eV

insulator > 3 eV

λ_max = 1240 ÷ E_g nm

0 K: pure Si is an insulator

Doping

n-type: P, As, Sb

p-type: B, Al, In

n_en_h = n_i²

Both stay neutral

Temperature

semiconductor: R falls

metal: R rises

σ = e(n_eμ_e + n_hμ_h)

μ_e > μ_h

Junction

forward: thin, low R

reverse: wide, high R

V_B: Si 0.7, Ge 0.3 V

E = V_B ÷ d

Rectifier

half: f, full: 2f

η: 40.6%, 81.2%

ripple: 1.21, 0.48

V_dc = V₀ ÷ π, 2V₀ ÷ π

Zener

reverse, parallel to load

I = (V_in − V_Z) ÷ R

I_Z = I − I_L

I_Z(max) = P ÷ V_Z

Opto

LED: forward

photodiode: reverse

solar cell: no bias, 4th quad.

solar E_g: 1.0 to 1.8 eV

Transistor

I_E = I_B + I_C

α = I_C ÷ I_E, β = I_C ÷ I_B

A_V = βR_L ÷ R_i

A_P = βA_V, phase 180°

Gates

NAND: 1 1 1 0

NOR: 1 0 0 0

XOR: 0 1 1 0

Universal: NAND, NOR

TOP MISTAKES

Avoid these = easy marks

MISTAKE ✗

n-type crystal is negative

Depletion widens in forward bias

Zener in forward bias, in series

Output of CE amplifier is in phase

CORRECT ✓

n-type and p-type are neutral

Forward thins it; reverse widens it

Reverse bias, parallel with the load

It is 180° out of phase